ELECTRONICS OF DIGITAL SYSTEMS
Academic year and teacher
If you can't find the course description that you're looking for in the above list,
please see the following instructions >>
- Versione italiana
- Academic year
- 2019/2020
- Teacher
- PIERO OLIVO
- Credits
- 6
- Curriculum
- Architectures & processing
- Didactic period
- Primo Semestre
- SSD
- ING-INF/01
Training objectives
- The course explores the basic concepts already covered in a first course of Digital Electronics and analyzes in detail the basic blocks present in integrated digital systems. As an example of an electronic system, the issues related to a complex system of great interest will be discussed in detail: the solid state drive ( SSDs ) and their basic components, the NAND flash memory
The main knowledge gained will cover the analysis and design techniques of integrated digital circuit and systems with attention to low energy devices and solid state memory. In particular:
•operation and sizing of static and dynamic combinational circuits;
•operation and sizing of static and dynamic sequential circuits;
•timing of electronic devices: distribution of the clock signal and deviations from the expected behavior;
•operation of the main math blocks: adders, multipliers, shifters;
•testing of digital integrated circuits;
•nonvolatile Flash: operation of NOR, NAND, multilevel NAND;
•SSDs : architecture and design issues.
The main skills (that are the ability to apply knowledge acquired) will be the analysis and design of digital systems using dedicated components. In particular:
•identify the combinational and sequential circuits most suitable for the project of a specific electronic system;
•identify math blocks most suitable for the design of a specific electronic system;
•understand the timing problems which may arise during the project of an electronic system;
•identify the test procedure most suitable for an electronic system;
•identify the design constraints of a Self Test scheme in a digital integrated circuit;
•analyze the relationship between performance and reliability of non-volatile memory and select the most suitable component for the design specs;
•identify the design specs of a solid-state drive.
The knowledge and skills acquired will be used in the courses of “Architecture of digital Systems”, “Design of electronic systems”, and “Lab of integrated electronic systems”. Prerequisites
- To follow the course a full knowledge of the basics of Digital Electronics is mandatory.
Since the course covers the fundamentals of digital electronics on-chip, to take the course students do not need to have followed the teaching of "Electronic devices". Course programme
- The course includes 60 hours (58 hours classroom and a 2-hour seminar held by an industrial designer.) By treating basic topics, preparatory for other courses, there are no lab applications.
Combinational logic circuits (6 hours)
Static CMOS logics – Speed and power consumption of static logics – Critical signal concept – Switching activity and signal statistics – Correlation among signals – Ratio logics – Pass transistor logics – Dynamic logics - Speed and power consumption of static logics – Charge loss – Connections of dynamic gates – Domino logics – Future trends
Sequential logic circuits (6 hours)
Metrics of sequential circuits – Static and dynamic memory elements – Latches and static registers – Problems in static circuits – Latches and dynamic registers – Problems in dynamic circuits – Other sequential circuits – Pipeline – General considerations regarding clock.
Timing and Synchronism (6 hours)
Synchronous systems generalities, Mesochronous, Asynchronous, self-timed - Skew e Jitter: effects on performance and functionalities; skew and jitter origin – Clock distribution techniques – Latch-based synchronization - Self-timed logics – End-of-operations circuits – Control Signals - PLL
Data path (6 hours)
General scheme of a microprocessor – Arithmetic blocks – Adders – Adder depending problems – Delay evaluation in an adder – Multipliers – Multiplier depending problems – Delay evaluation in a multiplier – Level shifters – Speed/power consumption trade-off in data paths – design techniques for power consumption reduction. Design trade-offs
Non Volatile Memories (14 hours)
Memory architectures – Decoders – Non volatile cells – NOR and NAND Flash memories – Differences among NOR and NAND Flash memories – NOR architecture – Program, erase and read operations – NAND architectures: interleaved and ABL, read circuits – Programming and erasing algorithms – Multilevel NAND – Data coding – Two-round and full sequence programming – Read operation – Cache reading – Distributions compaction. NAND-based systems: architecture – Memory controller - Flash Translation Layer: Wear leveling, Bad Block Management, Garbage collection
Solid-State Drives (14 hours)
Basic operation and architecture. Comparison between SSD and HDD - SSD controller –NAND memories organization – Host Interface: STA, SAS, PCIe – DRAM buffers –Caching techniques – SSD modeling – Adaptive techniques for NAND processing – Hybrid storage: SSD for enterprise applications – SSD architectures with universal memories
Testing of integrated circuits (6 hours)
Definitions; economics of testing – Fault simulation: fault models, stuck-at, parametric faults – Automated Test Pattern Generation – Design for Testability: economics of DFT – Scan design - Built-In-Self-Test: costs and advantages; random and pseudo-random generation; Signature analysis, BILBO – Boundary Scan (IEEE 1149.1 JTAG) - NAND flash testing : test flux – Accelerated tests – Specific issues.
The design of a digital electronic system (2 hours)
Seminar held by an industrial designer on the issues involved in a project of a digital electronic system. Didactic methods
- The course is organized as follows :
• lectures on all topics of the course (58 hours)
• 1 seminar held by an industrial designer (2 hours) Learning assessment procedures
- Oral exam.
The review aims to assess the student's ability in linking the effects that specific choices at circuit level can produce at system-level and in identifying the optimal design choices on the basis of design specs.
The test covers all the topics of the course .
The student will be assigned three topics and, before exposing them, he/she can organize the response (usually from 30 ' to 60 ', depending on the student’s needs) .
Given the complexity of many circuit diagrams, the student is not required to know how to redesign them. The student can use the schemes seen in class and on which he/she has studied. The goal of the study, in fact, is not to memorize circuit diagrams that, probably, in a few years will no longer be used, but you understand the theoretical, practical and economic reasons that led to the definition of the specific circuit solutions .
The preparation of the student will be evaluated, therefore, on the ability to remember diagrams or formulas, but on the ability to explain the reasons that led to specific and circuits and to identify possible limitations.
A positive exam is proof that the student has acquired the knowledge and skills specified in the learning objectives. Reference texts
- Teacher’s handouts available on the course web page
Specific topics can be further developed on the following texts:
J.M. Rabaey, A. Chandrakasan, B. Nikolic; Digital Integrated Circuits; Prentice Hall, 2nd edition, 2003
R. Micheloni, L. Crippa, A. Marelli; Inside NAND Flash Memories; Springler-Verlag, 2010
R. Micheloni, A. Marelli, K. Eshghi; Inside Solid-State Drives (SSDs); Springler-Verlag, 2012
