MICROPROCESSOR SYSTEMS
Academic year and teacher
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- Versione italiana
- Academic year
- 2018/2019
- Teacher
- MASSIMILIANO RUGGERI
- Credits
- 6
- Didactic period
- Primo Semestre
- SSD
- ING-INF/05
Training objectives
- The course is introductory to the structure and operation of computers and, in general, of processors and microcontrollers.
The main goal of the course is to make the student aware of the potential and the implementation methods for computer operations.
The student will acquire the knowledge of treatment methods of information at:
1) hardware: computer architecture
2) hardware: microprocessors
3) hardware: mamory systems (cache included)
4) hardware: peripheral systems
5) hardware: machine language
6) software: assembly language and special microcodes (assembly like)
7) software: higher level languages (imperatives): C/C++ language comparison.
8) performance and design methods to increase performance.
At the end of the course the student will know all about how instructions are executed into computers and will have the ability to apply the tools for programming in assembler, to design firmware on general purpose systems, on PC platform and embedded systems based on Intel processors.
Moreover the student will acquire the abilities to apply basic knowledge of the computers structure at internal architecture level, of the hardware structure and operation of operating code levels related to hardware control (BIOS).
The student will then acquire the ability to map areas of memory in the processor's address space, to calculate the chip select and to develope the design of the part that affects the memories card. The student will also be able to map devices directly connected to the main bus of the processor and he will acquire the ability to evaluate the performance of computers. Prerequisites
- "reti logiche" or "analisi e sintesi dei circuiti digitali" course
Course programme
- Digital systems: applications, basic principles, design.
Basics on informations treatment, management and transfer in digital systems.
Digital systems models.
Digital systems Architectural principles and design problems.
The central Unit: the microprocessors. memories, Input/output peripherals: management and interconnection techniques.
Assembly language for x86 processor family.
family x86 processors.
Pentium. Didactic methods
- lectures and workshops.
Lecture on topics related to computer architecture, computers and processors performance and components (peripherals, memories and processors).
Lectures and laboratory workshops related to machine language and assembly language.
Workshops and exercises related to final exam. Learning assessment procedures
- Passing the final exam is the proof that knowledge and abilities outlined in the training objectives of the course have been achieved.
The assessment consists of one written test lasting two hours. Each written test consists of three mini-tests that are conceived to evaluate the preparation of the student in the main areas of teaching the course.
The first test is related to low-level languages, typically assembler for X86 microprocessor families. The exercise can be a driver design request, a mathematical or data manipulation function design request, and it has to be carried out in assembly language, to be compiled and tested at run time. The exercise can be done in the classroom or the lab according to the number of students enrolled in each test and according to the availability of laboratories.
The second test is related to hardware circuit design based on a microprocessor system. Typically, but not exclusively, the student is asked to map areas of memory in the address space of the processor, to calculate the chip select and to make the drawing of the schematic of the circuit. Variants of the test also require the mapping of devices directly connected to the main processor bus. Processors are 8, 16 and 32 bits typically.
The third test can be focused on computers performance assessment, or on cache memories performance, or even on Pentium processors. The evaluation of each test depends upon the complexity of the test, but normally the weights are almost equal for the three tests, with an imbalance in the exercise assembler for its greater complexity. Reference texts
- All books in the list are eligible for official text for the course.
1) Giacomo Bucci, Architetture dei Calcolatori Elettronici, McGraw-Hill
2) Andrew S.Tanenbaum, Architetture dei calcolatori, Un approccio Strutturale, Pearson-Prentice Hall.
