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Versione italiana
Academic year
Didactic period
Secondo Semestre

Training objectives

The primary learning objective of the course is the understanding of the fundamentals of modern computer architecture organization and design, as well as of the key optimization techniques of processing performance.
Acquired knowledge at the end of the course will revolve around the hardware/software interface of computer architectures, and will include:

* Binary representation of information (instruction and data).
* Computer arithmetic (for integers as well as for floating point numbers).
* Syntheis of combinational Logic and Sequential Logic.
* Architecture of Arithmetic-Logic Units (ALUs).
* Working principles of the von Neumann machine.
* Static memory allocation based on the principle of natural data alignment.
* Instruction Set Architecture and Assembly Language.
* Micro-architectural design principles (control path and datapath).
* Performance optimization techniques in modern microprocessor architectures.
* Memory hierarchy and virtual memory.

The above concepts will be illustrated by means of concrete examples from the MIPS Instruction Set Architecture.

The key abilities that the students will gain include:

* Converting integer and floating point numbers across several bases.
* Representation of numbers and characters through the most common binary formats.
* Programming in Assembly Language for the MIPS ISA.
* Synthesis of simple combinational logic functions.
* Synthesis of simple finite state machines.
* Understanding the working principles of a von Neumann machine.
* Understanding natural data alignment for static memory allocation.
* Designing the datapath and the control path of a simple micro-architecture.
* Optimizing performance of a micro-architecture by means of advanced techniques such as pipelining, multiple execution paths or instruction scheduling.
* Understanding static and dynamic branch prediction techniques in modern microprocessors
* Analyzing the behaviour of C or Assembly code fragments on the datapath of a micro-architecture, mediated by the decisions of the compiler.
* Analyzing the cost-benefit trade-offs spanned by several kinds of cache architectures.
* Understanding the management overhead of a virtual memory system.


In order to follow proficiently the course, the following abilities are requested:
- Familiarity with basic arithmetic algorithms;
- Familiary with basic logic operators and with Boolean algebra;
- Basic C programming skills.

Course programme

- Overview of several computing fields and projection of major trends.
- Binary representation of information.
- Basic logic operators and gates
- Recalls of Boolean Algebra
- Synthesis through Karnaugh maps
- Standard combinational components
- Components for binary arithmetics
- Arithmetic and Logic Unit, multipliers
- Model of the von Neumann machine
- Instruction Set Architecture of the MIPS processor.
- Assembly language for MIPS and associated Lab. exercises.
- Handling procedure calls
- Data alignment in memory and processor endianess
- Computer arithmetic for integers.
- Computer arithmetic for floating point numbers based on the IEEE 754 standard.
- Datapath design fundamentals.
- Assembly instruction mapping on the datapath.
- Control path of a microarchitecture: design principles.
- Performance optimization technique: pipelining.
- Data hazard: definition, detection, solutions.
- Forwarding units and hazard detection units.
- Control hazards.
- Static branch prediction techniques.
- Dynamic and hybrid branch prediction techniques.
- Architectures with in-order instruction scheduling.
- Reorder buffer and register renaming
- Memory hierarchy: cache memory and scratchpad memory.
- Cache architectures: direct mapping, associativity.
- Virtual memory.

Didactic methods

The course is structured as follows:

- Lectures covering all course topics and accouting for roughly 75% of the total course hours. The teaching method is based on the projection of slides that will be made available at least the night before the lecture day. Lectures are given in a very interactive way, in order to develop the critical thinking and arguing skills of the students.

- Guided Lab exercises in the Informatics Lab, aiming at the development of a threefold ability in the students.
(a) ability to work out the algorithmic steps that process an input specification to achieve the computational goals that lead to the solution of assigned problems.
(b) ability to code such algorithmic steps into a programming language that is very close to the abstraction layer of the underlying computing platform (Assembly Language).
(c) ability to translate C code fragments into a matching Assembly representation, while optimizing the use of resources and the processing time.
Lab activities account for roughly 25% of the total course hours.

It will be possible to install the software used in the Lab activities directly on students' laptops, in order to maximize the opportunities for developing the programming skills.

Lectures are currently given face-to-face according to the course schedule.
Through an open blended learning tool, pre-recorded lectures covering course topics are made available.

Learning assessment procedures

The exam consists of two parts:

- Lab tests, which contribute from 1 to 5 points to the final mark.

- Written exam, which contributes from 15 (sufficient) to 25 (excellent exam) points to the final mark.

A student is entitled to be assigned a final mark when both tests have been successfully passed. The final mark is given by the sum of the points gained in the two parts of the exam, and is subject to the requirement that such sum should be higher than 18 to pass the exam.

A) Lab test.
The Lab test aims at verifying to what extent the ability to translate C code fragments into a matching Assembly implementation has been gained. The test is passed when the achieved score is larger or equal to 1.

B) Written Exam.
The written exam consists of open questions and enables to assess the students' ability to expose course topics in an appropriate, concise and logically-rigorous way. Questions tentatively cover all course topics, and consist of both basic questions on fundamental principles of computer architecture organization and design as well as on more detailed questions on selected course topics. The written exam also includes one exercise that covers the applicative aspects of the course, in particular the synthesis of logic functions through the method of Karnaugh maps. The written exam is passed if at least 15 points out of 25 are gained, and contributes a maximum of 25 points to the final mark.

The sum of the maximum points gained in the Lab test (5) and in the written exam (25) is equivalent to an overall 30 CUM LAUDE. However, the minimum vale of such sum should be larger or equal to 18 to pass the exam.

The two parts of the exam do not have logic and timing dependency constraints, in the sense that the Lab test can be given before or after or in the same day of the written exam, or vice versa. Should students be unsatisfied with the outcome of their test or of the written exam or of both of them, they are allowed to selectively re-try them. However, when their intention to retry a test is officially expressed, the outcome of the old one gets automatically discarded regardless of the outcome of the new one.

Reference texts

The reference books of the course are as follows.
For the Instruction Set Architecture and for Micro-architectures:

Computer Organization and Design - The Hardware/Software Interface
D. Patterson, J. Hennessy
5th Edition, Elsevier, 2013
ISBN 978-0-12-407726-3
(addressing the MIPS Instruction Set Architecture)

for which italian translations do exist, such as:

Struttura e Progetto dei Calcolatori
D. Patterson, J. Hennessy
4a edizione italiana,
Zanichelli, 2015
(addressing the MIPS Instruction Set Architecture)

There are also editions covering the ARM and the RISC-V Instruction Set Architectures.

For combinational and sequential logic:

Elementi di Progettazione dei Sistemi VLSI - Volume I: Introduzione all'Elettronica Digitale.
Autore: Mauro Olivieri.
EdiSES 2004.
(in italian only)

Projected slides in each lecture as well as specifications for Lab activities can be downloaded from a dedicated Google Classroom that will be set up for each course edition. Through the same Classroom, pre-recorded lectures covering course topics are also made available.